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Journal Article

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D.del Rio, I.Gurutzeaga, H.Solar, A.Beriain, R.Berenguer. Layout-Aware Design Methodology for a 75 GHz Power Amplifier in a 55nm SiGe Technology. Integration, the VLSI Journal.

doi:10.1016/j.vlsi.2015.07.010

Abstract:

This paper describes a method to design mmW PAs, by modeling the electromagnetic behavior of all the passive structures and the layout interconnections using a 3D-EM solver. It allows the optimization of the quality factor of capacitors (Q-factors > 20 can be obtained at 80GHz), the access points and arrangement of the power transistor cells. The method is applied to the design and optimization of an E-Band PA implemented in a 55nm SiGe BiCMOS technology. The PA presents a maximum power gain of 21.7dB at 74GHz, with a 3-dB bandwidth covering from 72.6 to 75.6GHz. The maximum output P1dB is 13.8dBm at 75GHz and the peak PAE is 14.1%.

 

 

 

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  • Project acronym
    E3Network

  • Project title
    Energy Efficient E-band transceiver for backhaul of the future networks

  • Project reference
    FP7-ICT-317957

  • Project coordinator
    CEIT (Spain)

  • Start date: 01/12/2012
    End date: 30/11/2015

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