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Deliverables

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D1.2.1 Specification of the E3Network transceiver 1

Executive Summary

 

 

This report attempts an in-depth, detailed specification of the different subsystems of the proposed E3Network transceiver, considering both E-Band radio frequency/analogue front-end and digital base-band processing units, in order to provide the initial necessary inputs for various tasks to be performed in WP2 and WP3.

After a brief analysis of the components of a typical wireless communication system, the system requirements of the E3Network transceiver are defined and categorized as DoW, Network, Equipment and Implementation requirements.

Next, an outline of the architecture design is given, specifying partners responsible for implementing each sub-block of the general block diagram of the transceiver, along with the definition of the various subsystem interfaces and requirements. Details are also given on the duplexer filter arrangements which will separate transmitted and received signals, as well as on the network interface of the transceiver for providing connection to standard network equipment.

Furthermore, the architecture design, internal block interfaces and block requirements are defined for each of the digital base-band transmission, RF-analogue transmission, RF-analogue reception, digital base-band reception and signal generation units. The parameter estimator and controller at the transmitter and the receiver are described so as to guarantee fulfilment of certain power efficiency criteria.

Finally, some considerations on the transceiver demonstrator architecture are presented, concerning the pros and cons of three different options for the baseband/ADC/DAC, the ADC and DAC expansion boards, as well as comparison of integration versus splitting of RF functionality, leading to combined versus separate transmitter and receiver units, respectively.

 

 

 

 

 

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  • Project acronym
    E3Network

  • Project title
    Energy Efficient E-band transceiver for backhaul of the future networks

  • Project reference
    FP7-ICT-317957

  • Project coordinator
    CEIT (Spain)

  • Start date: 01/12/2012
    End date: 31/05/2016

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