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D3.5 Prototype of the E-Band digital base-band processor

.Executive Summary

This deliverable D3.5 is an accompanying report to the E-Band Digital Base-Band processor prototype hardware (which will be used for integration in WP4).

This report describes measurement results using the prototype hardware and validates compliance with the specification of the E3Network Transceiver (see D1.2.3  REF D123 \h [1]).

The document is divided in three main sections. Section  REF _Ref436750653 \r \h 1 presents the hardware architecture of the Digital Base-Band processor comprising the Transmitter, Receiver, and Parameter Estimator and Controller subsystems. In section  REF _Ref436750663 \r \h 3 results of the Transmitter and Receiver implementation are summarized, and measurement results using the Digital Base-Band processor subsystems are given. Section  REF _Ref436750674 \r \h 4 depicts the Digital Base-Band processor prototype’s compliance to the requirements given in D1.2.3.










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  • Project acronym

  • Project title
    Energy Efficient E-band transceiver for backhaul of the future networks

  • Project reference

  • Project coordinator
    CEIT (Spain)

  • Start date: 01/12/2012
    End date: 31/05/2016

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